Product Overview

The PCIE-5565RC* is the PCI Express (PCIe) product in the Abaco Reflected Memory Real-Time Fibre Optic Networking product family.

Two or more PCIE5565RCs, as well as other products in this family, can be integrated into a network using standard fibre optic cables.

Each board in the network is referred to as a “node”.

Reflective memory allows computers, workstations, PLCs and other embedded controllers www.abb-drive.com with different architectures and different operating systems to share data in real time.

The 5565 Series Reflective Memory (referred to as RFM-5565 in this manual) is fast, flexible, and easy to operate.

Data is transferred via write memory (SDRAM) that appears to exist globally on all boards on the network.

The on-board circuitry performs data transfers to all other nodes automatically, with little or no host processor involvement.The block diagram of the PCIE-5565RC is shown in Figure 1 on page 10.

Features

Features include

– High-speed, easy-to-use fibre-optic network (serial rate of 2.12 Gbaud)

– x4-lane PCI Express 1.0a to PCI bridge

– Network operates without the involvement of a host processor

– Optional redundant operating modes

– Up to 256 nodes

– Connections up to 300 m to multimode fibre, up to 10 km to singlemode fibre

– 10 kilometres

– Dynamic packet sizes from 4 to 64 bytes of data per packet

– Transmission rates over fibre-optic networks from 43 MByte/s to 170 MByte/s

– 128/256 MB bytes of SDRAM reflective memory, parity selectable

– Independent direct memory access (DMA) channels

– Four general-purpose network interrupts; each interrupt has 32 bits of data

– Configurable endpoint translation for multiple CPU architectures on the same network

– Selectable PCI PIO window size from 2 MB bytes to 64 MB bytes to full installed memory size

– Supported Operating Systems Supports Windows® 2000. Windows XP, Linux®, and VxWorks® operating systems.

– RoHS compliant

Comparison of PCIE-5565RC and VMIPCI-5565*

The classic VMIPCI-5565* contains multiple components that are combined into a single Field Programmable Gate Array (FPGA) in the PCIE-5565RC.

These components include PLX Technologies’ PCI interface device, three separate small FPGAs, a transmit FIFO and a receive FIFO.

Compared to the legacy VMIPCI-5565. the PCIE-5565RC adds greater design flexibility and improves performance in at least three ways.

1. The PCIE-5565RC has improved DMA burst and PIO write access rates over the legacy VMIPCI-5565. 2.

2. The PCIE-5565RC doubles the on-board SDRAM memory access bandwidth, improving overall throughput.

3. The PCIE-5565RC can be field upgraded with new features.

The traditional VMIPCI-5565 contains a set of control registers in the PLX device and a separate set of RFM-specific control registers in the FPGA.

Since these two sets of registers are physically located in different devices, they need to be accessed through different memory areas.

On the other hand, the PCIE-5565RC contains two sets of registers in the same FPGA. These two sets of registers could have been combined.

However, in order to maintain software continuity and backward compatibility, the two sets of registers are stored separately as in the conventional VMIPCI-5565.

In addition, the individual bit functions within the registers (where applicable) remain compatible.The PCIE-5565RC does not include a second DMA engine.